diff mbox series

[v1,1/1] arm64: zynqmp: Add output-enable pins to SOMs

Message ID 20231209110647.890409-1-neal.frager@amd.com
State New
Headers show
Series [v1,1/1] arm64: zynqmp: Add output-enable pins to SOMs | expand

Commit Message

Neal Frager Dec. 9, 2023, 11:06 a.m. UTC
Now that the zynqmp pinctrl driver supports the tri-state registers, make
sure that the pins requiring output-enable are configured appropriately for
SOMs.

Without it, all tristate setting for MIOs, which are not related to SOM
itself, are using default configuration which is not correct setting.
It means SDs, USBs, ethernet, etc. are not working properly.

In past it was fixed through calling tristate configuration via bootcmd:
usb_init=mw 0xFF180208 2020
kv260_gem3=mw 0xFF18020C 0xFC0 && gpio toggle gpio@ff0a000038 && \
  gpio toggle gpio@ff0a000038

Signed-off-by: Neal Frager <neal.frager@amd.com>
---
 arch/arm/dts/zynqmp-sck-kd-g-revA.dts | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Neal Frager Dec. 12, 2023, 7:25 a.m. UTC | #1
> Now that the zynqmp pinctrl driver supports the tri-state registers, make sure that the pins requiring output-enable are configured appropriately for SOMs.

> Without it, all tristate setting for MIOs, which are not related to SOM itself, are using default configuration which is not correct setting.
> It means SDs, USBs, ethernet, etc. are not working properly.

> In past it was fixed through calling tristate configuration via bootcmd:
> usb_init=mw 0xFF180208 2020
> kv260_gem3=mw 0xFF18020C 0xFC0 && gpio toggle gpio@ff0a000038 && \
>  gpio toggle gpio@ff0a000038

> Signed-off-by: Neal Frager <neal.frager@amd.com>
> ---
> arch/arm/dts/zynqmp-sck-kd-g-revA.dts | 7 +++++++
> 1 file changed, 7 insertions(+)

> diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dts b/arch/arm/dts/zynqmp-sck-kd-g-revA.dts
> index 56f3128528..ffdb60fa51 100644
> --- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dts
> +++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dts
> @@ -175,6 +175,7 @@
 
Please do not apply v1 of this patch.  I will making a slight update / correction with v2.

Best regards,
Neal Frager
AMD
diff mbox series

Patch

diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dts b/arch/arm/dts/zynqmp-sck-kd-g-revA.dts
index 56f3128528..ffdb60fa51 100644
--- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dts
+++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dts
@@ -175,6 +175,7 @@ 
 		conf-tx {
 			pins = "MIO36";
 			bias-disable;
+			output-enable;
 		};
 
 		mux {
@@ -220,12 +221,14 @@ 
 		conf-rx {
 			pins = "MIO45", "MIO46", "MIO47", "MIO48";
 			bias-disable;
+			output-enable;
 			low-power-disable;
 		};
 
 		conf-bootstrap {
 			pins = "MIO44", "MIO49";
 			bias-disable;
+			output-enable;
 			low-power-disable;
 		};
 
@@ -233,6 +236,7 @@ 
 			pins = "MIO38", "MIO39", "MIO40",
 				"MIO41", "MIO42", "MIO43";
 			bias-disable;
+			output-enable;
 			low-power-enable;
 		};
 
@@ -241,6 +245,7 @@ 
 			slew-rate = <SLEW_RATE_SLOW>;
 			power-source = <IO_STANDARD_LVCMOS18>;
 			bias-disable;
+			output-enable;
 		};
 
 		mux-mdio {
@@ -271,6 +276,7 @@ 
 			pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
 			"MIO60", "MIO61", "MIO62", "MIO63";
 			bias-disable;
+			output-enable;
 			drive-strength = <4>;
 			slew-rate = <SLEW_RATE_SLOW>;
 		};
@@ -298,6 +304,7 @@ 
 			pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
 			"MIO72", "MIO73", "MIO74", "MIO75";
 			bias-disable;
+			output-enable;
 			drive-strength = <4>;
 			slew-rate = <SLEW_RATE_SLOW>;
 		};