diff mbox series

[v22,7/8] arm64: dts: nuvoton: npcm8xx: replace reg with syscon property

Message ID 20240108135421.684263-8-tmaimon77@gmail.com
State New
Headers show
Series None | expand

Commit Message

Tomer Maimon Jan. 8, 2024, 1:54 p.m. UTC
Replace reg with syscon property since the clock registers handle the
reset registers as well.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
---
 arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Tomer Maimon Jan. 16, 2024, 7:39 p.m. UTC | #1
Hi Krzysztof,

Thanks for your comment.

On Wed, 10 Jan 2024 at 22:59, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 08/01/2024 14:54, Tomer Maimon wrote:
> > Replace reg with syscon property since the clock registers handle the
> > reset registers as well.
> >
> > Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
> > ---
>
> NAK for the same reasons as previous patch.
Will explain more in the commit message
>
> Best regards,
> Krzysztof
>

Best regards,

Tomer
Krzysztof Kozlowski Jan. 16, 2024, 8:41 p.m. UTC | #2
On 16/01/2024 20:39, Tomer Maimon wrote:
> Hi Krzysztof,
> 
> Thanks for your comment.
> 
> On Wed, 10 Jan 2024 at 22:59, Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org> wrote:
>>
>> On 08/01/2024 14:54, Tomer Maimon wrote:
>>> Replace reg with syscon property since the clock registers handle the
>>> reset registers as well.
>>>
>>> Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
>>> ---
>>
>> NAK for the same reasons as previous patch.
> Will explain more in the commit message

No, this wasn't even tested. Build your code with W=1 and fix all
warnings first. But anyway this is not the way to go.

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
index 7d5956e2c9f3..5cc0efdbb3c7 100644
--- a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
+++ b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
@@ -59,10 +59,10 @@  rstc: reset-controller@f0801000 {
 			nuvoton,sysgcr = <&gcr>;
 		};
 
-		clk: clock-controller@f0801000 {
+		clk: clock-controller {
 			compatible = "nuvoton,npcm845-clk";
 			#clock-cells = <1>;
-			reg = <0x0 0xf0801000 0x0 0x1000>;
+			nuvoton,sysclk = <&clk_rst>;
 			clocks = <&refclk>;
 			clock-names = "refclk";
 		};